VLSI architectures for multidimensional transforms
| Title | VLSI architectures for multidimensional transforms |
| Publication Type | Journal Articles |
| Year of Publication | 1991 |
| Authors | Chakrabarti C, JaJa JF |
| Journal | Computers, IEEE Transactions on |
| Volume | 40 |
| Issue | 9 |
| Pagination | 1053 - 1057 |
| Date Published | 1991/09// |
| ISBN Number | 0018-9340 |
| Keywords | architecture;, architectures;, arithmetic;, complexity;, computational, Computer, digital, fixed-precision, linear, multidimensional, separable, transforms;, VLSI |
| Abstract | The authors propose a family of VLSI architectures with area-time tradeoffs for computing (N times;N times; . . . times;N) d-dimensional linear separable transforms. For fixed-precision arithmetic with b bits, the architectures have an area A=O(Nd+2a) and computation time T=O(dNd/2-ab ), and achieve the AT2 bound of AT2=O(n2b 2) for constant d, where n=Nd and O lt;a les;d/2 |
| DOI | 10.1109/12.83648 |